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GCC defines several built-in macros so that the user code can test for the presence or absence of features. Almost any of the following built-in macros are deduced from device capabilities and thus triggered by the -mmcu= command-line option.

For even more AVR-specific built-in macros see AVR Named Address Spaces and AVR Built-in Functions.


Build-in macro that resolves to a decimal number that identifies the architecture and depends on the -mmcu=mcu option. Possible values are:

2, 25, 3, 31, 35, 4, 5, 51, 6, 102, 104, 105, 106, 107

for mcu=avr2, avr25, avr3, avr31, avr35, avr4, avr5, avr51, avr6, avrxmega2, avrxmega4, avrxmega5, avrxmega6, avrxmega7, respectively. If mcu specifies a device, this built-in macro is set accordingly. For example, with -mmcu=atmega8 the macro will be defined to 4.


Setting -mmcu=device defines this built-in macro which reflects the device’s name. For example, -mmcu=atmega8 defines the built-in macro __AVR_ATmega8__, -mmcu=attiny261a defines __AVR_ATtiny261A__, etc.

The built-in macros’ names follow the scheme __AVR_Device__ where Device is the device name as from the AVR user manual. The difference between Device in the built-in macro and device in -mmcu=device is that the latter is always lowercase.

If device is not a device but only a core architecture like avr51, this macro will not be defined.


The device / architecture belongs to the XMEGA family of devices.


The device has the the ELPM instruction.


The device has the ELPM Rn,Z and ELPM Rn,Z+ instructions.


The device has the MOVW instruction to perform 16-bit register-register moves.


The device has the LPM Rn,Z and LPM Rn,Z+ instructions.


The device has a hardware multiplier.


The device has the JMP and CALL instructions. This is the case for devices with at least 16 KiB of program memory.


The device has the EIJMP and EICALL instructions. This is the case for devices with more than 128 KiB of program memory. This also means that the program counter (PC) is 3 bytes wide.


The program counter (PC) is 2 bytes wide. This is the case for devices with up to 128 KiB of program memory.


The stack pointer (SP) register is treated as 8-bit respectively 16-bit register by the compiler. The definition of these macros is affected by -mtiny-stack.


The device has the SPH (high part of stack pointer) special function register or has an 8-bit stack pointer, respectively. The definition of these macros is affected by -mmcu= and in the cases of -mmcu=avr2 and -mmcu=avr25 also by -msp8.


The device has the RAMPD, RAMPX, RAMPY, RAMPZ special function register, respectively.


This macro reflects the -mno-interrupts command line option.


Some AVR devices (AT90S8515, ATmega103) must not skip 32-bit instructions because of a hardware erratum. Skip instructions are SBRS, SBRC, SBIS, SBIC and CPSE. The second macro is only defined if __AVR_HAVE_JMP_CALL__ is also set.


Instructions that can address I/O special function registers directly like IN, OUT, SBI, etc. may use a different address as if addressed by an instruction to access RAM like LD or STS. This offset depends on the device architecture and has to be subtracted from the RAM address in order to get the respective I/O address.


The compiler is configured to be used together with AVR-Libc. See the --with-avrlibc configure option.

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