6.56.3.35 Vector shift right by constant and accumulate
- uint32x2_t vsra_n_u32 (uint32x2_t, uint32x2_t, const int)
Form of expected instruction(s): vsra.u32 d0, d0, #0
- uint16x4_t vsra_n_u16 (uint16x4_t, uint16x4_t, const int)
Form of expected instruction(s): vsra.u16 d0, d0, #0
- uint8x8_t vsra_n_u8 (uint8x8_t, uint8x8_t, const int)
Form of expected instruction(s): vsra.u8 d0, d0, #0
- int32x2_t vsra_n_s32 (int32x2_t, int32x2_t, const int)
Form of expected instruction(s): vsra.s32 d0, d0, #0
- int16x4_t vsra_n_s16 (int16x4_t, int16x4_t, const int)
Form of expected instruction(s): vsra.s16 d0, d0, #0
- int8x8_t vsra_n_s8 (int8x8_t, int8x8_t, const int)
Form of expected instruction(s): vsra.s8 d0, d0, #0
- uint64x1_t vsra_n_u64 (uint64x1_t, uint64x1_t, const int)
Form of expected instruction(s): vsra.u64 d0, d0, #0
- int64x1_t vsra_n_s64 (int64x1_t, int64x1_t, const int)
Form of expected instruction(s): vsra.s64 d0, d0, #0
- uint32x4_t vsraq_n_u32 (uint32x4_t, uint32x4_t, const int)
Form of expected instruction(s): vsra.u32 q0, q0, #0
- uint16x8_t vsraq_n_u16 (uint16x8_t, uint16x8_t, const int)
Form of expected instruction(s): vsra.u16 q0, q0, #0
- uint8x16_t vsraq_n_u8 (uint8x16_t, uint8x16_t, const int)
Form of expected instruction(s): vsra.u8 q0, q0, #0
- int32x4_t vsraq_n_s32 (int32x4_t, int32x4_t, const int)
Form of expected instruction(s): vsra.s32 q0, q0, #0
- int16x8_t vsraq_n_s16 (int16x8_t, int16x8_t, const int)
Form of expected instruction(s): vsra.s16 q0, q0, #0
- int8x16_t vsraq_n_s8 (int8x16_t, int8x16_t, const int)
Form of expected instruction(s): vsra.s8 q0, q0, #0
- uint64x2_t vsraq_n_u64 (uint64x2_t, uint64x2_t, const int)
Form of expected instruction(s): vsra.u64 q0, q0, #0
- int64x2_t vsraq_n_s64 (int64x2_t, int64x2_t, const int)
Form of expected instruction(s): vsra.s64 q0, q0, #0
- uint32x2_t vrsra_n_u32 (uint32x2_t, uint32x2_t, const int)
Form of expected instruction(s): vrsra.u32 d0, d0, #0
- uint16x4_t vrsra_n_u16 (uint16x4_t, uint16x4_t, const int)
Form of expected instruction(s): vrsra.u16 d0, d0, #0
- uint8x8_t vrsra_n_u8 (uint8x8_t, uint8x8_t, const int)
Form of expected instruction(s): vrsra.u8 d0, d0, #0
- int32x2_t vrsra_n_s32 (int32x2_t, int32x2_t, const int)
Form of expected instruction(s): vrsra.s32 d0, d0, #0
- int16x4_t vrsra_n_s16 (int16x4_t, int16x4_t, const int)
Form of expected instruction(s): vrsra.s16 d0, d0, #0
- int8x8_t vrsra_n_s8 (int8x8_t, int8x8_t, const int)
Form of expected instruction(s): vrsra.s8 d0, d0, #0
- uint64x1_t vrsra_n_u64 (uint64x1_t, uint64x1_t, const int)
Form of expected instruction(s): vrsra.u64 d0, d0, #0
- int64x1_t vrsra_n_s64 (int64x1_t, int64x1_t, const int)
Form of expected instruction(s): vrsra.s64 d0, d0, #0
- uint32x4_t vrsraq_n_u32 (uint32x4_t, uint32x4_t, const int)
Form of expected instruction(s): vrsra.u32 q0, q0, #0
- uint16x8_t vrsraq_n_u16 (uint16x8_t, uint16x8_t, const int)
Form of expected instruction(s): vrsra.u16 q0, q0, #0
- uint8x16_t vrsraq_n_u8 (uint8x16_t, uint8x16_t, const int)
Form of expected instruction(s): vrsra.u8 q0, q0, #0
- int32x4_t vrsraq_n_s32 (int32x4_t, int32x4_t, const int)
Form of expected instruction(s): vrsra.s32 q0, q0, #0
- int16x8_t vrsraq_n_s16 (int16x8_t, int16x8_t, const int)
Form of expected instruction(s): vrsra.s16 q0, q0, #0
- int8x16_t vrsraq_n_s8 (int8x16_t, int8x16_t, const int)
Form of expected instruction(s): vrsra.s8 q0, q0, #0
- uint64x2_t vrsraq_n_u64 (uint64x2_t, uint64x2_t, const int)
Form of expected instruction(s): vrsra.u64 q0, q0, #0
- int64x2_t vrsraq_n_s64 (int64x2_t, int64x2_t, const int)
Form of expected instruction(s): vrsra.s64 q0, q0, #0
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