6.56.3.12 Subtraction
- uint32x2_t vsub_u32 (uint32x2_t, uint32x2_t)
Form of expected instruction(s): vsub.i32 d0, d0, d0
- uint16x4_t vsub_u16 (uint16x4_t, uint16x4_t)
Form of expected instruction(s): vsub.i16 d0, d0, d0
- uint8x8_t vsub_u8 (uint8x8_t, uint8x8_t)
Form of expected instruction(s): vsub.i8 d0, d0, d0
- int32x2_t vsub_s32 (int32x2_t, int32x2_t)
Form of expected instruction(s): vsub.i32 d0, d0, d0
- int16x4_t vsub_s16 (int16x4_t, int16x4_t)
Form of expected instruction(s): vsub.i16 d0, d0, d0
- int8x8_t vsub_s8 (int8x8_t, int8x8_t)
Form of expected instruction(s): vsub.i8 d0, d0, d0
- float32x2_t vsub_f32 (float32x2_t, float32x2_t)
Form of expected instruction(s): vsub.f32 d0, d0, d0
- uint64x1_t vsub_u64 (uint64x1_t, uint64x1_t)
- int64x1_t vsub_s64 (int64x1_t, int64x1_t)
- uint32x4_t vsubq_u32 (uint32x4_t, uint32x4_t)
Form of expected instruction(s): vsub.i32 q0, q0, q0
- uint16x8_t vsubq_u16 (uint16x8_t, uint16x8_t)
Form of expected instruction(s): vsub.i16 q0, q0, q0
- uint8x16_t vsubq_u8 (uint8x16_t, uint8x16_t)
Form of expected instruction(s): vsub.i8 q0, q0, q0
- int32x4_t vsubq_s32 (int32x4_t, int32x4_t)
Form of expected instruction(s): vsub.i32 q0, q0, q0
- int16x8_t vsubq_s16 (int16x8_t, int16x8_t)
Form of expected instruction(s): vsub.i16 q0, q0, q0
- int8x16_t vsubq_s8 (int8x16_t, int8x16_t)
Form of expected instruction(s): vsub.i8 q0, q0, q0
- uint64x2_t vsubq_u64 (uint64x2_t, uint64x2_t)
Form of expected instruction(s): vsub.i64 q0, q0, q0
- int64x2_t vsubq_s64 (int64x2_t, int64x2_t)
Form of expected instruction(s): vsub.i64 q0, q0, q0
- float32x4_t vsubq_f32 (float32x4_t, float32x4_t)
Form of expected instruction(s): vsub.f32 q0, q0, q0
- uint64x2_t vsubl_u32 (uint32x2_t, uint32x2_t)
Form of expected instruction(s): vsubl.u32 q0, d0, d0
- uint32x4_t vsubl_u16 (uint16x4_t, uint16x4_t)
Form of expected instruction(s): vsubl.u16 q0, d0, d0
- uint16x8_t vsubl_u8 (uint8x8_t, uint8x8_t)
Form of expected instruction(s): vsubl.u8 q0, d0, d0
- int64x2_t vsubl_s32 (int32x2_t, int32x2_t)
Form of expected instruction(s): vsubl.s32 q0, d0, d0
- int32x4_t vsubl_s16 (int16x4_t, int16x4_t)
Form of expected instruction(s): vsubl.s16 q0, d0, d0
- int16x8_t vsubl_s8 (int8x8_t, int8x8_t)
Form of expected instruction(s): vsubl.s8 q0, d0, d0
- uint64x2_t vsubw_u32 (uint64x2_t, uint32x2_t)
Form of expected instruction(s): vsubw.u32 q0, q0, d0
- uint32x4_t vsubw_u16 (uint32x4_t, uint16x4_t)
Form of expected instruction(s): vsubw.u16 q0, q0, d0
- uint16x8_t vsubw_u8 (uint16x8_t, uint8x8_t)
Form of expected instruction(s): vsubw.u8 q0, q0, d0
- int64x2_t vsubw_s32 (int64x2_t, int32x2_t)
Form of expected instruction(s): vsubw.s32 q0, q0, d0
- int32x4_t vsubw_s16 (int32x4_t, int16x4_t)
Form of expected instruction(s): vsubw.s16 q0, q0, d0
- int16x8_t vsubw_s8 (int16x8_t, int8x8_t)
Form of expected instruction(s): vsubw.s8 q0, q0, d0
- uint32x2_t vhsub_u32 (uint32x2_t, uint32x2_t)
Form of expected instruction(s): vhsub.u32 d0, d0, d0
- uint16x4_t vhsub_u16 (uint16x4_t, uint16x4_t)
Form of expected instruction(s): vhsub.u16 d0, d0, d0
- uint8x8_t vhsub_u8 (uint8x8_t, uint8x8_t)
Form of expected instruction(s): vhsub.u8 d0, d0, d0
- int32x2_t vhsub_s32 (int32x2_t, int32x2_t)
Form of expected instruction(s): vhsub.s32 d0, d0, d0
- int16x4_t vhsub_s16 (int16x4_t, int16x4_t)
Form of expected instruction(s): vhsub.s16 d0, d0, d0
- int8x8_t vhsub_s8 (int8x8_t, int8x8_t)
Form of expected instruction(s): vhsub.s8 d0, d0, d0
- uint32x4_t vhsubq_u32 (uint32x4_t, uint32x4_t)
Form of expected instruction(s): vhsub.u32 q0, q0, q0
- uint16x8_t vhsubq_u16 (uint16x8_t, uint16x8_t)
Form of expected instruction(s): vhsub.u16 q0, q0, q0
- uint8x16_t vhsubq_u8 (uint8x16_t, uint8x16_t)
Form of expected instruction(s): vhsub.u8 q0, q0, q0
- int32x4_t vhsubq_s32 (int32x4_t, int32x4_t)
Form of expected instruction(s): vhsub.s32 q0, q0, q0
- int16x8_t vhsubq_s16 (int16x8_t, int16x8_t)
Form of expected instruction(s): vhsub.s16 q0, q0, q0
- int8x16_t vhsubq_s8 (int8x16_t, int8x16_t)
Form of expected instruction(s): vhsub.s8 q0, q0, q0
- uint32x2_t vqsub_u32 (uint32x2_t, uint32x2_t)
Form of expected instruction(s): vqsub.u32 d0, d0, d0
- uint16x4_t vqsub_u16 (uint16x4_t, uint16x4_t)
Form of expected instruction(s): vqsub.u16 d0, d0, d0
- uint8x8_t vqsub_u8 (uint8x8_t, uint8x8_t)
Form of expected instruction(s): vqsub.u8 d0, d0, d0
- int32x2_t vqsub_s32 (int32x2_t, int32x2_t)
Form of expected instruction(s): vqsub.s32 d0, d0, d0
- int16x4_t vqsub_s16 (int16x4_t, int16x4_t)
Form of expected instruction(s): vqsub.s16 d0, d0, d0
- int8x8_t vqsub_s8 (int8x8_t, int8x8_t)
Form of expected instruction(s): vqsub.s8 d0, d0, d0
- uint64x1_t vqsub_u64 (uint64x1_t, uint64x1_t)
Form of expected instruction(s): vqsub.u64 d0, d0, d0
- int64x1_t vqsub_s64 (int64x1_t, int64x1_t)
Form of expected instruction(s): vqsub.s64 d0, d0, d0
- uint32x4_t vqsubq_u32 (uint32x4_t, uint32x4_t)
Form of expected instruction(s): vqsub.u32 q0, q0, q0
- uint16x8_t vqsubq_u16 (uint16x8_t, uint16x8_t)
Form of expected instruction(s): vqsub.u16 q0, q0, q0
- uint8x16_t vqsubq_u8 (uint8x16_t, uint8x16_t)
Form of expected instruction(s): vqsub.u8 q0, q0, q0
- int32x4_t vqsubq_s32 (int32x4_t, int32x4_t)
Form of expected instruction(s): vqsub.s32 q0, q0, q0
- int16x8_t vqsubq_s16 (int16x8_t, int16x8_t)
Form of expected instruction(s): vqsub.s16 q0, q0, q0
- int8x16_t vqsubq_s8 (int8x16_t, int8x16_t)
Form of expected instruction(s): vqsub.s8 q0, q0, q0
- uint64x2_t vqsubq_u64 (uint64x2_t, uint64x2_t)
Form of expected instruction(s): vqsub.u64 q0, q0, q0
- int64x2_t vqsubq_s64 (int64x2_t, int64x2_t)
Form of expected instruction(s): vqsub.s64 q0, q0, q0
- uint32x2_t vsubhn_u64 (uint64x2_t, uint64x2_t)
Form of expected instruction(s): vsubhn.i64 d0, q0, q0
- uint16x4_t vsubhn_u32 (uint32x4_t, uint32x4_t)
Form of expected instruction(s): vsubhn.i32 d0, q0, q0
- uint8x8_t vsubhn_u16 (uint16x8_t, uint16x8_t)
Form of expected instruction(s): vsubhn.i16 d0, q0, q0
- int32x2_t vsubhn_s64 (int64x2_t, int64x2_t)
Form of expected instruction(s): vsubhn.i64 d0, q0, q0
- int16x4_t vsubhn_s32 (int32x4_t, int32x4_t)
Form of expected instruction(s): vsubhn.i32 d0, q0, q0
- int8x8_t vsubhn_s16 (int16x8_t, int16x8_t)
Form of expected instruction(s): vsubhn.i16 d0, q0, q0
- uint32x2_t vrsubhn_u64 (uint64x2_t, uint64x2_t)
Form of expected instruction(s): vrsubhn.i64 d0, q0, q0
- uint16x4_t vrsubhn_u32 (uint32x4_t, uint32x4_t)
Form of expected instruction(s): vrsubhn.i32 d0, q0, q0
- uint8x8_t vrsubhn_u16 (uint16x8_t, uint16x8_t)
Form of expected instruction(s): vrsubhn.i16 d0, q0, q0
- int32x2_t vrsubhn_s64 (int64x2_t, int64x2_t)
Form of expected instruction(s): vrsubhn.i64 d0, q0, q0
- int16x4_t vrsubhn_s32 (int32x4_t, int32x4_t)
Form of expected instruction(s): vrsubhn.i32 d0, q0, q0
- int8x8_t vrsubhn_s16 (int16x8_t, int16x8_t)
Form of expected instruction(s): vrsubhn.i16 d0, q0, q0
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