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10.3 Cycle Counters

FFTW’s planner actually executes and times different possible FFT algorithms in order to pick the fastest plan for a given n. In order to do this in as short a time as possible, however, the timer must have a very high resolution, and to accomplish this we employ the hardware cycle counters that are available on most CPUs. Currently, FFTW supports the cycle counters on x86, PowerPC/POWER, Alpha, UltraSPARC (SPARC v9), IA64, PA-RISC, and MIPS processors.

Access to the cycle counters, unfortunately, is a compiler and/or operating-system dependent task, often requiring inline assembly language, and it may be that your compiler is not supported. If you are not supported, FFTW will by default fall back on its estimator (effectively using FFTW_ESTIMATE for all plans).

You can add support by editing the file kernel/cycle.h; normally, this will involve adapting one of the examples already present in order to use the inline-assembler syntax for your C compiler, and will only require a couple of lines of code. Anyone adding support for a new system to cycle.h is encouraged to email us at fftw@fftw.org.

If a cycle counter is not available on your system (e.g. some embedded processor), and you don’t want to use estimated plans, as a last resort you can use the --with-slow-timer option to configure (on Unix) or #define WITH_SLOW_TIMER in config.h (elsewhere). This will use the much lower-resolution gettimeofday function, or even clock if the former is unavailable, and planning will be extremely slow.


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